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About Me

Research Engineer at Arm Research

Education

  • Georgia Institute of Technology, Atlanta, GA
    • Ph.D. in Computer Science, Fall 2009 - August 2013
      • Thesis Topic: Shared Resource Management for Efficient Heterogeneous Computing
      • Thesis Advisor: Prof. Hyesoon Kim
    • M.S. in Computer Science, May 2009
    • Graduate courses
  • Sogang University, Seoul, Korea
    • B.S. in Computer Science, February 2007

Work Experience

  • Research Engineer, November 2017 - Present
    Arm Research, Austin, TX
  • Silicon Architecture Engineer, September 2013 - November 2017
    MIC (Xeon-Phi) Architecture, Intel/PDG, Hillsboro, OR
  • Graduate Research Assistant, 2008 - 2013
    Georgia Institute of Technologoy, Atlanta, GA
  • Graduate Intern Technical, May 2012 - August 2012
    Platform architecture research group, Intel Labs, Intel, Santa Clara, CA
    Manager: Mani Azimi
  • Graduate Intern Technical, May 2011 - August 2011
    Visual and Parallel Computing Group (VPG), Intel, Austin, TX
    Manager: Eric Sprangle

Publications

  1. Yasuo Ishii, Jaekyu Lee, Krishnendra NAthella, and Dam Sunwoo, “Re-establishing Fetch-Directed Instruction Prefetching: An Industry Perspective”, to appear in 2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2021 (acceptance rate: 36.9% (24/65)).
  2. Yasuo Ishii, Jaekyu Lee, Krishnendra Nathella, and Dam Sunwoo, “Rebasing Instruction Prefetching: An Industry Perspective,”, In IEEE Computer Architecture Letters (CAL), vol. 19, no. 2, pp. 147-150, 1 July-Dec. 2020. Selected as one of three Best of CAL in 2020.
  3. Yonghae Kim, Jaekyu Lee, and Hyesoon Kim, “Hardware-based Always-On Heap Memory Safety,”, In 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Athens, Greece, 2020, pp. 1153-1166 (acceptance rate: 19.4% (82/422))
  4. Jaekyu Lee, Yasuo Ishii, and Dam Sunwoo. “Securing Branch Predictors with Two-Level Encryption”, In ACM Trans. Archit. Code Optim. (TACO) 17, 3, Article 21 (August 2020). Also invited to 16th Int’l Conf. on High-Performance and Embedded Architectures and Compilers (HiPEAC), January, 2021.
  5. Jaekyu Lee, Dong Hyuk Woo, Hyesoon Kim, and Mani Azimi, “GREEN Cache: Exploiting the Disciplined Memory Model of OpenCL on GPUs”, In IEEE Transactions on Computers (TC), Volume: 64, Issue: 11, Nov. 1 2015 test
  6. Jaekyu Lee, Si Li, Hyesoon Kim, and Sudhakar Yalamanchili, “Design Space Exploration of On-chip Ring Interconnection for a CPU-GPU Heterogeneous Architecture”, In Journal of Parallel and Distributed Computing (JPDC), Vol. 73, Issue 12, pp. 1525-1538, December 2013
  7. Jaekyu Lee, Si Li, Hyesoon Kim, and Sudhakar Yalamanchili, “Adaptive Virtual Channel Partitioning for Network-on-Chip in Heterogeneous Architectures”, In ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 18, No. 4, pp.48:1-48:28, October 2013
  8. Jaewoong Sim, Jaekyu Lee, Moinnuddin Qureshi, and Hyesoon Kim, “FLEXclusion: Balancing Cache Capacity and On-Chip Traffic with Flexible Exclusion”, In Proc. of the 39th Int’l Symp. on Computer Architecture (ISCA-39), Portland, OR, June, 2012 (acceptance rate 18% (47/262))
  9. Jaekyu Lee, Hyesoon Kim, and Richard Vuduc, “When Prefetching Works, When It Doesn’t, and Why”, In ACM Transactions on Architecture and Code Optimization (TACO), Vol. 9, No. 1, pp.2:1-2:29, March 2012. Also invited to 8th Int’l Conf. on High-Performance and Embedded Architectures and Compilers (HiPEAC), January, 2013
  10. Jaekyu Lee and Hyesoon Kim, “TAP: A TLP-Aware Cache Management Schemes for a CPU-GPU Heterogeneous Architecture”, In Proc. of the 18th Int’l Symp. on High Performance Computer Architecture (HPCA-18), pp.91-102, New Orleans, LA, February, 2012 (acceptance rate 17% (36/210))
  11. Nagesh B. Lakshminarayana, Jaekyu Lee, Hyesoon Kim, and Jinwoo Shin, “DRAM Scheduling Policy for a GPGPU Architecture Based on a Potential Function”, IEEE Computer Architecture Letters (CAL), Vol. 11, Issue 2, November 2011
  12. Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim, and Richard Vuduc, “Many-Thread Aware Prefetching Mechanisms for GPGPU Applications”, In Proc. of the 43rd Int’l Symp. of Microarchitecture (MICRO-43), pp.213-224, Atlanta, GA, December, 2010 (acceptance rate 18% (45/248))
  13. Nagesh B. Lakshminarayana, Jaekyu Lee, and Hyesoon Kim, “Age Based Scheduling for Asymmetric Multiprocessors”, SC, pp.25:1-25:12, November, 2009 (acceptance rate 23% (59/261))

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